The inventive concepts relate to a semiconductor memory device, and more particularly, to a memory device and/or a system for performing a page state informing function and supporting a page management policy of a memory controller in order to allow the memory controller to identify a page state of the memory device.
A system typically includes a processor, a memory device, and a memory controller. The memory controller is provided to allow other components of the system and the processor as well to access the memory device. Performance of the system is influenced by a memory read latency and a memory write latency during an operation of accessing the memory device in response to a read and/or write memory transaction by the processor. The memory read latency and the memory write latency are predominant to the memory controller that determines whether pages of the memory device are in an open state or a closed state. If the memory device is able to inform the memory controller of an open/close state of a page, when the memory controller establishes and/or implement a page management policy, a reference to the open/close state of the page may help in improving the system performance.